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CMOS Fabrication

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CMOS( Complementary metal- oxide- semiconductor). CMOS is also sometimes referred to as complementary-symmetry metal–oxide–semiconductor.The words “complementary-symmetry” refer to the fact that the typical digital design style with CMOS uses complementary and symmetrical pairs of p-type and n-type, metal oxide semiconductor filed effect transistor (MOSFETs) for logic functions.

Two important characteristics of CMOS devices are high noise immunity and low static power consumption. Since one transistor of the pair is always off, the series combination draws significant power only momentarily during switching between on and off states. Consequently, CMOS devices do not produce as much waste heat  as other forms of logic, for example transistor-transistor- logic (TTL) or NMOS-logic, which normally have some standing current even when not changing state. CMOS also allows a high density of logic functions on a chip. It was primarily for this reason that CMOS became the most used technology to be implemented in VLSI chips.

The CMOS fabrication technology, which requires that both n-channel (nMOS) and p-channel (pMOS)transistors be built on the same chip substrate. To accommodate both nMOS and pMOSdevices, special regions must be created in which the semiconductor type is opposite to the substrate type. These regions are called wells or tubs. A p-well is created in an n-type substrate or, alternatively, an n- well is created in a p-type substrate. In the simple n-well CMOS fabrication technology presented, the nMOS transistor is created in the p-type substrate, and the pMOS transistor is created in the n-well, which is built-in into the p-type substrate. In the twin-tub CMOS technology, additional tubs of the same type as the substrate can also be created for the device optimization.

Process Sequence

 

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